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Please use this identifier to cite or link to this item: https://dr.ddn.upes.ac.in//xmlui/handle/123456789/2126
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dc.contributor.authorKumari, Vijaya-
dc.date.accessioned2015-05-22T06:46:00Z-
dc.date.available2015-05-22T06:46:00Z-
dc.date.issued2015-
dc.identifier.citationSubmitted under the guidance of:Dr. Adesh Kumaren_US
dc.identifier.urihttp://hdl.handle.net/123456789/2126-
dc.publisherB.Tech.(Electronics Engineering)en_US
dc.titleDesign and FPGA Implementation of Digital PLL and Its Application in FMen_US
dc.typeOtheren_US
Appears in Collections:Under Graduate

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